Semiconductor device and method of producing the same, and power conversion apparatus incorporating this semiconductor device

ABSTRACT

The temperature of a bipolar semiconductor element using a wide-gap semiconductor is raised using heating means, such as a heater, to obtain a power semiconductor device being large in controllable current and low in loss. The temperature is set at a temperature higher than the temperature at which the decrement of the steady loss of the wide-gap bipolar semiconductor element corresponding to the decrement of the built-in voltage lowering depending on the temperature rising of the wide-gap bipolar semiconductor element is larger than the increment of the steady loss corresponding to the increment of the ON resistance increasing depending on the temperature rising.

CROSS-REFERENCE

This application is a Divisional of U.S. application Ser. No. 10/530,883filed on Apr. 11, 2005, which claims priority to Japanese ApplicationSerial No. 2003-299219 filed on Aug. 22, 2003. Both applications arehereby incorporated by reference for all purposes.

TECHNICAL FIELD

The present invention relates to a power semiconductor device beinglarge in controllable current (permissible maximum current in ON/OFFcontrol under electrifying state), and a power conversion apparatusincorporating this power semiconductor device.

BACKGROUND ART

A power semiconductor device for use in a power apparatus dealing with ahigh voltage and a large current is required to be low in power loss,large in controllable current and high in reliability. As conventionalpower semiconductor devices being large in controllable current andlarge in power capacity, an insulated gate bipolar transistor (IGBT) anda self-excited thyristor made of silicon (Si) are available. Theself-excited thyristor is a thyristor capable of carrying out on/offcontrol according to a gate control signal, and a gate turn offthyristor (GTO thyristor), a static induction thyristor, a MOSthyristor, etc. are known. In addition, as other power semiconductordevices, diodes having a pn-junction, such as a pn-junction diode, anMPS (Merged pin/Schottky) diode and an SRD (Soft and Recovery Diode),are known.

In recent years, wide-gap semiconductor materials, such as siliconcarbide (SiC), are attracting attention as semiconductor materials tosubstitute for Si. In comparison with Si, SiC has excellent physicalcharacteristics, being remarkably high in dielectric breakdown fieldstrength, operable at a high temperature of 150° C. or more and large inenergy gap. The development of power semiconductor devices using SiC asa material suited for power semiconductor devices which are low in lossand high in withstand voltage is carried out. As a self-excitedthyristor made of a wide-gap semiconductor material, a SIC-GTO thyristorhas been disclosed in 2001 IEEE ELECTRON DEVICE LETTERS, Vol. 22, No. 3,pages 127 to 129. In the SIC-GTO thyristor, the gate control signal onlyselects either current flowing (ON) or current shutoff (OFF) but doesnot control the value of the current, therefore a controllable currentis larger than that of the IGBT. The switching speed of the SiC-GTOthyristor is very high, having a level equivalent to that of the SiIGBT, therefore its switching loss is as small as that of the Si IGBT.

Nonpatent literature 1: 2001 IEEE ELECTRON DEVICE LETTERS, Vol. 22, No.3, pages 127 to 129.

Nonpatent literature 2: Proceedings of the 14th International Symposiumon Power Semiconductor Devices & ICs 2002, pages 41 to 44

DISCLOSURE OF THE INVENTION Problem to be Solved by the Invention

In transistors such as an IGBT, the current to be passed changesaccording to the level of the gate control signal, and the value of thecurrent to be passed is restricted according to the level of the gatecontrol signal. However, since the current to be passed becomessaturated eventually, the controllable current is small. In a thyristor,for example, after it is turned on once, since the current to be passedis not restricted according to the gate control signal, the controllablecurrent can be made large. The fact that the gate control signal onlyselects either current flowing or current shutoff but cannot control thevalue of the current is hereinafter referred to as “the current to bepassed is not restricted according to the gate control signal.” The factthat “the current to be passed is restricted according to the gatecontrol signal” means that the gate control signal can control the valueof the current.

The power loss of a transistor such as an IGBT is smaller than that of athyristor. Generally speaking, the total power loss (hereinafterreferred to as total loss) of a semiconductor device is represented bythe following expression (1).

Total loss=(steady loss)+(switching loss)={(built-in voltage)+(ONresistance)(current to be passed)}(current to be passed)+(switchingloss)  (1)

The ON resistance of a Si IGBT is slightly larger than that of a Siself-excited thyristor. Hence, its steady loss is slightly large.However, since its switching speed is very high, its switching loss isvery small; as a result, its total loss is small. The ON resistance of awide-gap bipolar semiconductor device made of SiC or the like is smallerthan that of a Si bipolar semiconductor device. However, the energy gapof SiC is larger than that of Si. Hence, the built-in voltage of a SiCsemiconductor device is far larger than the built-in voltage of a Sisemiconductor device by 2.2 to 6.1 times. Hence, the steady loss of theSiC semiconductor device becomes very large, and its total loss becomeslarger than that of the Si semiconductor device. As described above, itis difficult to realize a SiC power semiconductor device being low inloss and large in controllable current using conventional technologies.

The present invention purposes to provide a semiconductor device beinglow in loss, large in controllable current and high in reliability, amethod of producing the semiconductor device, and a power conversionapparatus.

Means for Solving Problem

A semiconductor device in accordance with the present inventioncomprises a wide-gap bipolar semiconductor element using wide-gapsemiconductors and having a built-in voltage in a forwardcharacteristic, and a semiconductor package accommodating theabove-mentioned wide-gap bipolar semiconductor element and havingelectrical connection means for connecting the above-mentioned wide-gapbipolar semiconductor element to external apparatuses. Theabove-mentioned semiconductor package has heating means for keeping theabove-mentioned wide-gap bipolar semiconductor element at apredetermined temperature higher than ordinary temperature. In thefollowing descriptions, the simply stated word “temperature” means thejunction temperature of a semiconductor device at all times, unlessotherwise specified.

A semiconductor device in accordance with the present inventioncomprises a wide-gap bipolar light-emitting semiconductor element usingwide-gap semiconductors, and a wide-gap photodiode provided so as to beopposed to the above-mentioned wide-gap bipolar light-emittingsemiconductor element and to receive light emitted from said wide-gapbipolar light-emitting semiconductor element. The above-mentionedwide-gap bipolar light-emitting semiconductor element and wide-gapphotodiode are accommodated in a package having electrical connectionmeans for connecting the above-mentioned wide-gap bipolar light-emittingsemiconductor element and wide-gap photodiode to external apparatuses.The above-mentioned package has heating means for keeping theabove-mentioned package at a predetermined temperature higher thanordinary temperature.

A semiconductor device production method in accordance with the presentinvention comprises a step of forming a second conductive type SiC driftlayer having low impurity concentration on a first conductive type SiCcathode region having high impurity concentration, and a step of forminga first conductive type SiC base region on the above-mentioned driftlayer. The above-mentioned production method further comprises a step offorming a second conductive type SiC anode region on the above-mentionedbase region, and a step of irradiation of an electron beam havingpredetermined irradiation energy to the above-mentioned cathode region,drift region, base region and anode region at a predetermined electrondensity.

A semiconductor device production method in accordance with the presentinvention comprises a step of forming a first conductive type SiC driftlayer having low impurity concentration on a first conductive type SiCcathode region having high impurity concentration, and a step of forminga second conductive type SiC anode region on the above-mentioned driftlayer. The above-mentioned production method further comprises a step offorming an anode electrode on the above-mentioned anode region, a stepof forming a cathode electrode on the above-mentioned cathode region,and a step of generating stacking faults in the above-mentioned driftlayer and anode region by passing a predetermined forward current for apredetermined time between the above-mentioned anode electrode andcathode electrode.

A power conversion apparatus in accordance with the present inventioncomprises a GTO thyristor element using wide-gap semiconductors, and adiode element using wide-gap semiconductors and connected in reverseparallel to the above-mentioned GTO thyristor element. Theabove-mentioned GTO thyristor element and the above-mentioned diodeelement are accommodated in a package having electrical connection meansfor connecting the above-mentioned GTO thyristor element and theabove-mentioned diode element in reverse parallel and for connecting theabove-mentioned GTO thyristor element and the above-mentioned diodeelement having been connected in reverse parallel to externalapparatuses. The above-mentioned package is provided with a switchingcircuit in which three series connections, each comprising at least twoswitching modules connected in series and each switching module havingheating means for keeping the above-mentioned GTO thyristor element anddiode element at a predetermined temperature higher than ordinarytemperature, are connected in parallel between the positive electrodeand the negative electrode of a DC power source. Each of theabove-mentioned switching modules is provided with a control circuitthat controls the operation of the above-mentioned switching circuitafter each switching module is heated using the above-mentioned heatingmeans and the temperature of each switching module reaches apredetermined temperature.

The wide-gap bipolar semiconductor device in accordance with the presentinvention will be described below. The fact that the gate control signalonly selects either current flowing or current shutoff but does notcontrol the value of the current is hereinafter referred to as “thecurrent to be passed is not restricted according to the gate controlsignal.” The fact that “the current to be passed is restricted accordingto the gate control signal” means that the gate control signal cancontrol the value of the current. In the following descriptions, thecharacteristics of the semiconductor device in accordance with thepresent invention will be described while being compared as necessarywith those of Si semiconductor devices and the like based onconventional technologies.

First, a controllable current will be described. In the wide-gap bipolarsemiconductor devices, such as a pn-junction diode and a self-excitedthyristor in accordance with the present invention using wide-gapsemiconductors, the current to be passed is not restricted according tothe gate control signal. Hence, the controllable currents of thesewide-gap bipolar semiconductor devices in accordance with the presentinvention are larger than those of bipolar semiconductor devices such asan IGBT or wide-gap semiconductor devices, in which the current to bepassed is restricted according to the gate control signal. Inparticular, the controllable current of the wide-gap bipolarsemiconductor device in accordance with the present invention is largeeven at a high temperature exceeding the operation limit junctiontemperature (approximately 125° C. to 150° C.) of a conventional Sibipolar semiconductor device.

Next, total loss will be described. Generally speaking, when thetemperature of a semiconductor device rises, its built-in voltage lowersand its ON resistance increases. In a Si bipolar semiconductor devicehaving a predetermined built-in voltage in the forward directioncharacteristic such as a conventional Si pn-junction diode and aconventional self-excited thyristor, when the temperature of the bipolarelement is raised, its total loss increases. In the case of theconventional Si semiconductor device, when its temperature is raised,its built-in voltage decreases, but its ON resistance and carrierlife-time increase significantly. Its steady loss increasessignificantly owing to this significant increase of the ON resistance.The increment of this steady loss is larger than the decrement of thesteady loss owing to the decrease of the built-in voltage, whereby thetotal steady loss increases. Furthermore, since the switching time atthe turn OFF significantly increases owing to the significant increaseof the carrier life-time, the switching loss increases significantly. Asa result, the total loss increases as obviously indicated by Expression(1).

The inventors have found the following facts as a result of variousexperiments.

The following two phenomena were found with respect to quantitativetemperature dependency as a result of the comparison of respectivetemperature dependencies between a wide-gap bipolar semiconductor deviceand a Si bipolar semiconductor device having the same withstand voltage.

A first phenomenon is that in the case that the temperature of thewide-gap bipolar semiconductor device is raised, the decrement of thesteady loss owing to the decrease of the built-in voltage is larger thanthe increment of the steady loss owing to the increase of the ONresistance in a practical current density range (for example, a currentdensity of 1 A to 700 A/cm²).

Generally speaking, the switching time at the turn OFF of asemiconductor device becomes longer as the temperature rises, and theswitching loss increases.

A second phenomenon is that the increase of the switching time of thewide-gap bipolar semiconductor device owing to temperature rise is lessthan that of a bipolar semiconductor device such as a Si IGBT, and thatthe increase of the switching loss is thus small, provided that theirwithstand voltage values are the same.

The factor of the first phenomenon is as described below. The ONresistance of the wide-gap bipolar semiconductor device is significantlysmaller than that of the Si bipolar semiconductor device at ordinarytemperature. Hence, even if the ON resistance of the wide-gap bipolarsemiconductor device is increased owing to temperature rise, itsincrement is small.

The factor of the second phenomenon is as described below. The carrierlife-time of the wide-gap bipolar semiconductor device is significantlyshorter than that of the Si bipolar semiconductor device. Hence, even ifthe carrier life-time of the wide-gap bipolar semiconductor device isincreased owing to temperature rise, its increment is small.

The present invention uses the above-mentioned first and secondphenomena and is characterized in that the wide-gap bipolarsemiconductor device is operated while its temperature is kept at atemperature higher than ordinary temperature using a temperature raisingmeans. In other words, the temperature of the element of the wide-gapbipolar semiconductor device, such as a pn-junction diode or aself-excited thyristor is raised using a temperature raising means.Hence, the decrease of the steady loss owing to the decrease of thebuilt-in voltage can be made larger than the increase of the steady lossowing to the increase of the ON resistance. As a result, the totalsteady loss can be reduced. On the other hand, since the increment ofthe switching loss owing to temperature rise is relatively small, thetotal loss can be reduced.

In the wide-gap bipolar semiconductor device, since the quality of itscrystal is not yet sufficiently good, there are numerous carrier trapsof various kinds. Hence, in the wide-gap bipolar semiconductor device,its tail current at the turn-off is significantly larger than that ofSi. As the temperature of the wide-gap bipolar semiconductor devicebecomes high, this tail current further increases, and the switchingloss increases significantly. It is conceivable that this is caused bythe release of numerous trapped carriers at the high temperature.

As a result of various experiments, the inventors have found a thirdphenomenon wherein this tail current can be reduced by irradiation of anelectron beam or a charged particle beam to the wide-gap bipolarsemiconductor device. This is conceivable that newly formed traps in theSiC semiconductor layer of the wide-gap bipolar semiconductor device byirradiating the electron beam or the charged particle beam becomedominant over the existing traps, and that the carrier life-time isdetermined by these traps. However, excessive irradiation leads toincrease in ON voltage and steady loss. As to electron beam irradiationconditions, the irradiation energy is selected in the range of 0.1 MeVto 20 MeV and the amount of irradiation is selected in the range of 510¹¹/cm² to 5 10¹⁴/cm² of the number of electrons per unit area, forexample and then annealing is carried out. The carrier life-time can beadjusted in the range of approximately 0.01 μs to 20 μs using electronbeam irradiation on the above-mentioned irradiation conditions.Consequently, the tail current can be reduced without causingsignificant increase in ON voltage; as a result, the switching loss canbe reduced significantly. The reduction effect of the switching lossowing to this electron beam irradiation is added to the reduction effectof the steady loss component owing to the decrease in built-in voltageobtained as the result of raising the temperature of the element bymeans of the temperature raising means as described above. Therefore,the total loss of the semiconductor device can be reduced while itscontrollability is maintained properly, and the purpose of the presentinvention can be accomplished effectively.

Furthermore, in the case of the wide-gap bipolar semiconductor device,even if its total loss is made smaller than that of the Si bipolarsemiconductor device by raising the temperature of the semiconductorelement, the energy gap of the wide-gap bipolar semiconductor device isnot lower than the energy gap of Si, and a considerable margin ispresent. Hence, even if the temperature of the semiconductor element israised to the extent described above, thermal runaway or thermaldestruction hardly occurs, therefore high reliability with respect totemperature can be ensured. Still further, for the purpose of obtaininga high withstand voltage, the electric field in the field relaxationregion can be lowered by setting the width of the field relaxationregion at a value larger than its theoretical limit value. Even in thiscase, the increment of the ON resistance owing to the increase of thewidth of the field relaxation region is smaller than that of the Sibipolar semiconductor element, because the ON resistance of the wide-gapbipolar semiconductor element is significantly low. In other words, highreliability can be ensured without impairing the low losscharacteristic. As mentioned above, the present invention can realize asemiconductor device being low in loss, large in controllable currentand high in reliability.

According to the temperature dependency of the ON voltage of thewide-gap bipolar semiconductor element, the ON voltage is high at a lowtemperature and gradually lowers as the temperature becomes higher.However, there is a tendency that the ON voltage becomes the lowest at acertain upper limit temperature (in the case of SiC, it is determineddepending on the element structure in the range of 350 to 600° C.) andbecomes high reversely at a temperature higher than the above-mentionedupper limit temperature. This means that the temperature dependency ofthe steady loss of the element also has a similar tendency. Therefore,it is not desirable that the temperature of the semiconductor element israised to the above-mentioned upper limit temperature or more. Thisupper limit temperature depends on the density of the current to bepassed and lowers as the current density is high. For example, in thecase of the SiC bipolar semiconductor device, the temperature isapproximately 300° C. at the current density of 700 A/cm² andapproximately 750° C. at the current density of 5 A/cm². For the purposeof effectively attaining the object of the present invention forincreasing the controllable current, the SiC bipolar semiconductordevice is used at a value of the current density higher than the currentdensity (25 to 40 A/cm²) corresponding to the rated current of a Sibipolar semiconductor element having the same rating. The upper limittemperature of the SiC bipolar semiconductor device at the high currentdensity is approximately 600° C. The desirable temperature range fordriving the SiC bipolar semiconductor device is higher than ordinarytemperature and not more than the above-mentioned upper limittemperature. This temperature range is hereinafter referred to as a“proper temperature range.” The proper temperature range is, forexample, 200° C. to 400° C. In order to operate the SiC bipolarsemiconductor device within this proper temperature range, it may bepossible that operation is started at room temperature and then thetemperature of the SiC bipolar semiconductor device is raised to theproper temperature range by self-heating owing to its steady loss.However, for the purpose of promptly stabilizing the temperature, it ispreferable that the operation of the SiC bipolar semiconductor device isstarted after heated in advance so that its temperature is in theabove-mentioned proper temperature range. In other words, in the casethat a load is driven using a predetermined constant power source formedof a power conversion apparatus comprising wide-gap semiconductorelements, the elements are heated to a high temperature by a heatingmeans and then started so as to be driven. With this method, not onlythe steady loss can be made small but also the load can be brought tosteady operation promptly, whereby the reliability of the powerconversion apparatus is improved.

The wide-gap bipolar semiconductor element has a peculiar crystal defectdepending on crystal face orientation, and this crystal defect mayimpair the reliability of the element. For example, in a pn diode as atypical wide-gap bipolar semiconductor element of a four-layer hexagonalshape SiC, an n-type semiconductor region is formed by epitaxial growthon a crystal face inclined 3 to 8 degrees with respect to the (0001)crystal face so that a single crystal can be obtained easily. Next, ap-type semiconductor region is formed on this n-type semiconductorregion by epitaxial growth or ion implantation. When the above-mentionedn-type and p-type semiconductor regions are formed, a crystal defectreferred to as basal plane dislocation occurs in both the semiconductorregions. It is known that when a pn diode having the basal planedislocation is electrified, the basal plane dislocation forms “stackingfaults, each of which is denoted by a reference sign 1X.” It isconsidered that the stacking faults are formed by the impact energygenerated when minority carriers implanted, for example, from the p-typesemiconductor region to the n-type semiconductor region collide with thelattice point of a crystal. The quantity of the stacking faults formedby energization is greater as the current to be passed for theenergization is larger. The stacking faults trap, recombine and vanishimplanted minority carriers, whereby the life-time of the minoritycarriers is shortened. The increase of the stacking faults shows adegradation phenomenon of the semiconductor region; as a result, the ONvoltage becomes high. The high ON voltage results in the increase of thepower loss during the energization, and there is a danger that the pndiode element may be destroyed by heat in some cases.

As a result of various experiments, the inventors have found that whenthe temperature of the pn diode element is raised, the minority carriertrapping action owing to the above-mentioned stacking faults decreasesand that the vanishing of minority carriers owing to the recombinationcan be prevented. Even if the stacking faults increase, the phenomenonrising the ON voltage can be suppressed by maintaining a hightemperature of the pn diode element. More specifically, the minoritycarrier trapping action begins to decrease in the state that thetemperature of the pn diode element is 50° C. or more, and it almostdisappears at 250° C. or more, and the phenomenon wherein the ON voltagebecomes high occurs very rarely. As a result, the increase in power losscan be prevented, and high reliability can be attained.

The stacking faults formed once are not vanished even if the temperatureof the element is lowered; hence, if energization is carried out whenthe temperature of the element is low, a large power loss occurs owingto the action of the stacking faults, and there is a danger that theelement may be destroyed. Hence, the temperature of the element israised in advance to 125° C. or more before energization. Whenenergization is started at this temperature, the temperature of theelement rises abruptly and reaches 250° C. or more in a short time owingto self-heating. Therefore, even if stacking faults are present, theinfluence thereof can be avoided, and the element can be energized whilethe ON voltage does not become high.

As a means for raising the temperature of the wide-gap bipolarsemiconductor element, a heating means is provided to heat the wide-gapbipolar semiconductor element. In addition, as another means for raisingthe temperature of the wide-gap bipolar semiconductor element, theself-heating generated at the time when part or whole of the componentsof the wide-gap bipolar semiconductor element is energized may also beused to raise the temperature. Both the heating using the heating meansand the self-heating may also be used together. When the self-heating isused, the temperature of the wide-gap bipolar semiconductor element canbe raised to a desired value by properly setting the size, material andshape of a heat sink provided on the wide-gap bipolar semiconductorelement. When the heat sink is made small and employs a material havinga specific heat, the rising speed of the temperature of the wide-gapbipolar semiconductor element can be increased, and the temperature canbe raised high. Furthermore, an air cooling fan may also be provided asnecessary. The temperature of the wide-gap bipolar semiconductor elementcan be set at a desired value by adjusting the rotation speed of thefan. In the case that the self-heating is utilized, no heating means isrequired, whereby the configuration of the wide-gap bipolarsemiconductor element is simplified.

EFFECT OF THE INVENTION

In the semiconductor device in accordance with the present invention,the wide-gap bipolar semiconductor element having a built-in voltage inforward direction characteristic and for controlling current flowing andshutoff according to a control signal is started to operate after it israised to a predetermined temperature in advance. Hence, it is possibleto realize a semiconductor device being large in controllable current,low in loss and high in reliability.

BRIEF DESCRIPTION OF DRAWINGS

FIG. 1 is a cross-sectional view of a wide-gap pn diode device inaccordance with a first embodiment of the present invention;

FIG. 2 is a cross-sectional view of a wide-gap GTO thyristor device inaccordance with a second embodiment of the present invention;

FIG. 3 is a cross-sectional view of a GTO thyristor element for use inthe wide-gap GTO thyristor device in accordance with the secondembodiment of the present invention, sectioned in a plane perpendicularto the paper face of FIG. 2;

FIG. 4 is a cross-sectional view of an optically-coupled wide-gapsemiconductor device in accordance with a third embodiment of thepresent invention;

FIG. 5 is a cross-sectional view of a SiC-pn diode device in accordancewith a fourth embodiment of the present invention;

FIG. 6 is a circuit diagram of a three-phase inverter apparatus inaccordance with a fifth embodiment of the present invention, configuredusing the wide-gap semiconductor devices in accordance with theabove-mentioned respective embodiments; and

FIG. 7 is a cross-sectional view of a switching module for use in theinverter apparatus in accordance with the fifth embodiment of thepresent invention.

EXPLANATIONS OF NUMERALS

-   1 cathode region-   2 drift layer-   3 anode region-   4 field relaxation region-   5 surface protection film-   6 anode electrode-   7 cathode electrode-   8 lead wire-   9, 11 lead pin-   10, 38, 67, 125 support-   12 insulating glass-   13 pn diode element-   14 metal cap-   15, 46, 85, 127 heater-   18 temperature sensor-   21 cathode region-   22 buffer region-   24 base region-   25 anode region-   27 surface protection film-   28 anode electrode-   31 gate electrode-   32 cathode electrode-   42 synthetic polymer compound-   51 GaN-GTO thyristor-   52 SiC photodiode-   53 cathode region-   54 gate region-   55 anode region-   57 surface protection film-   60 light emission window-   80 light-receiving portion-   88 heat sink-   90 inverter apparatus-   98 fan-   100 a, 100 b switching module

BEST MODES FOR CARRYING OUT THE INVENTION

Preferred embodiments in accordance with the present invention will bedescribed below referring to FIG. 1 to FIG. 7. In each figure, thedimensions of each component shown in the figure do not correspond toits actual dimensions so that the figure can be understood easily. Inthe following descriptions, the simply stated word “temperature” meansthe junction temperature of a semiconductor device at all times, unlessotherwise specified.

FIRST EMBODIMENT

A semiconductor device in accordance with a first embodiment of thepresent invention is a SiC (silicon carbide) pn diode device 19 having awithstand voltage of 8.5 kV and will be described below referring toFIG. 1.

FIG. 1 is a cross-sectional view of the SiC-pn diode device 19 inaccordance with the first embodiment of the present invention. In FIG.1, a SiC pn diode element 13 is an element of a four-layer hexagonalshape, and an n-type SiC drift layer 2 having low impurity concentrationand a thickness of approximately 95 μm is formed on an n-type SiCcathode region 1 having high impurity concentration and a thickness ofapproximately 300 μm. On the lower face of the cathode region 1, acathode metal electrode 7 is formed. A p-type SiC anode region 3constituting the main junction to the drift layer 2 is formed in thecentral region of the drift layer 2. Around the anode region 3, a p-typeSiC field relaxation region 4 is formed. An anode metal electrode 6 isformed on the anode region 3. A surface protection film 5 is formed onthe surface of the element, excluding the anode metal electrode 6.

The anode metal electrode 6 is connected to the connection end 9 a of alead pin 9 made of metal and serving as an electrical connection meansvia a lead wire 8 made of gold. The cathode metal electrode 7 is bondedto the upper face of a support 10 made of metal so as to maintainelectrical connection. A lead pin 11 made of metal and serving as anelectrical connection means is connected at the central portion of thelower face of the support 10. This SiC-pn diode device 19 is connectedto external wires via the lead pins 9 and 11. The lead pin 9 passesthrough the support 10, and the pass-through portion thereof is tightlysealed and firmly fixed with high melting point insulating glass 12. Theupper face of the support 10, including the pn diode element 13 and theconnection end 9 a of the lead pin 9, is covered with a cap 14 made ofmetal, and the space 44 in the interior thereof is filled with nitrogengas.

On the lower face of the support 10, a sheet-shaped heater 15 comprisinga nichrome wire 15 a embedded inside a sheet made of heat-resistantrubber, such as silicone rubber, is installed as a heating means forraising the temperature of the pn diode element 13. The heater 15 hasterminals 16 a and 16 b covered with insulators 17 a and 17 b,respectively, so that a current is passed through the nichrome wire 15 adisposed inside.

An example of a method of producing the SiC-pn diode device 19 inaccordance with this embodiment will be described in detail. The cathodemetal electrode 7 of the SiC-pn diode element 13 is soldered to thesupport 10 using gold-silicon high-temperature solder. The lead wire 8of gold connects between the anode electrode 6 and the end 9 a of thelead pin 9 of metal using a lead bonding apparatus. In FIG. 1, the leadwire 8, only one in number, is shown; however, in an actual element, amultiplicity of the lead wires 8 are connected in parallel depending onthe value of the current flowing therethrough. The metal cap 14 isattached on the support 10 configured above in the atmosphere ofnitrogen gas, and the periphery thereof is welded and tightly sealed toform a package. Hence, the space 44 inside the cap 14 is filled withnitrogen gas. In the end, the heater 15 is bonded to the lower face ofthe support 10, and a temperature sensor 18 is installed on the outerface of the cap 14, whereby the SiC-pn diode device 19 is completed. Theconnection wire 18 a of the temperature sensor 18 is connected to atemperature controller 140. On the basis of the detection output of thetemperature sensor 18, the temperature controller 140 supplies theelectric power of a power source 141 to the heater 15 via connectionwires 142 and 143 and the terminals 16 a and 16 b of the heater 15 andcontrols the temperature of the pn diode element 13 to a predeterminedvalue.

An example of the operation of the SiC-pn diode device 19 in accordancewith this embodiment will be described below. Before the pn diode device19 is operated, the heater 15 is energized to heat the support 10, andthe temperature of the pn diode element 13 is kept at approximately 250°C. The detection of the temperature of the pn diode element 13 iscarried out by the following method in which a characteristic whereinthe ON voltage thereof rises corresponding to the temperature rise ofthe element is utilized. The SiC-pn diode device 19 provided with thecap 14 to form a package is put into a temperature-variable heatingchamber, and the temperature of the heating chamber is raised graduallyfrom room temperature. A forward pulse current, approximately twohundredths of the rated current, with a time width of 200 μs for exampleis passed through the pn diode element 13 during heating. When theabove-mentioned pulse current is passed, the temperature of the pn diodeelement 13, nearly equal to the temperature of the heating chamber, andthe ON voltage thereof are measured, and a calibration curve (graph)representing the relationship between the two is drawn. The temperatureis then measured using this graph. In other words, the above-mentionedpulse current is applied to the pn diode element 13 during heating, andthe ON voltage is measured. The temperature of the pn diode element 13can be known by referring to the above-mentioned graph on the basis ofthe measured value of the ON voltage. After the temperature of the pndiode element 13 reaches a predetermined value, 250° C. for example, theapplication of the pulse current is stopped, the energization of theheater 15 is controlled by the temperature controller 140 referring tothe detection value of the temperature sensor 18 to keep the temperatureof the pn diode element 13 at the above-mentioned predetermined value.

Next, a reverse voltage is applied across the lead pins 9 and 11 so thatthe potential at the lead pin 11 is higher than that of the lead pin 9,and the withstand voltage is measured. The withstand voltage of the pndiode device 19 in accordance with this embodiment is 8.5 kV. The leakcurrent density at a reverse voltage of 8.5 kV was 2 10⁻³ A/cm² or less,and a desired characteristic was obtained at a high temperature of 250°C. The controllable current was 200 A, and the energization of a currentof 200 A was possible at a cyclic frequency of 5 kHz and a high currentdensity of 360 A/cm². The ON voltage was 2.5 V, the reverse recoverycharge was 11 μC, the steady loss was approximately 280 W, and theswitching loss was approximately 33 W when the energization was carriedout at a high current density of 360 A/cm². At this time, the junctiontemperature of the pn diode element 13 became approximately 340° C. in ashort time of 3 seconds or less.

In the case of a conventional Si-pn diode having a withstand voltage of8.5 kV, as disclosed in the following literature “Proceedings of the14th International Symposium on Power Semiconductor Devices & ICs 2002,pages 41 to 44,” the ON voltage was 3.5 V and the reverse recoverycharge was approximately 125 μC at the time when a current of 150 A(having a current density of approximately 50 A/cm²) was passed throughat a junction temperature of 125° C. The steady loss of the SiC-pn diodedevice 19 in the present embodiment is approximately 95% in comparisonwith the above-mentioned conventional Si-pn diode. Furthermore, sincethe reverse recovery charge of the pn diode device in accordance withthis embodiment is smaller by approximately one order of magnitude, theswitching loss thereof also becomes smaller by approximately one orderof magnitude. The total loss of the SiC-pn diode device 19 can bereduced significantly to approximately 50% of that of the Si-pn diode.The ON resistance of the SiC-pn diode device 19 at a junctiontemperature of 340° C. is far smaller than the ON resistance of theSi-pn diode at a junction temperature of 125° C.; as a result, the totalloss becomes small. In the SiC semiconductor at a temperature of 340°C., an energy gap of approximately 1.66 eV remains until it loses theproperty of a semiconductor, as it were, until it becomes the state ofmetal. Since this energy gap of 1.66 eV is larger than the energy gap of1.1 eV of Si, at a temperature of 125° C., high reliability with respectto temperature can be ensured.

The thickness of the n-type drift layer 2 of the pn diode element 13 inaccordance with this embodiment is approximately 95 μm. Since thethickness of the depletion layer at the time when a reverse voltage of8.5 kV is applied to the pn diode element 13 is approximately 85 μm, amargin of approximately 10 μm is provided. Since the pn diode element 13in accordance with this embodiment has this margin in thickness, highreliability with respect to withstand voltage can be ensured.

Since operation is carried out after the temperature of the pn diodeelement 13 is raised to a high temperature of approximately 250° C. inadvance by the heater 15, the influence of stacking faults affecting theincrease of the ON voltage is reduced extremely, whereby the ON voltagecan be prevented from rising during operation. Hence, the loss caused inthe pn diode element 13 can be maintained at a constant value; also inthis point, high reliability can be ensured.

As mentioned above, according to the present embodiment, the SiC-pndiode device 19 being low in power loss, large in controllable currentand high in reliability can be realized.

SECOND EMBODIMENT

A semiconductor device in accordance with a second embodiment of thepresent invention is a SiC-GTO thyristor (Gate Turn-Off Thyristor)device 49 having a withstand voltage of 5 kV, and FIG. 2 is across-sectional view thereof. FIG. 3 is a cross-sectional view of a cellobtained when the GTO thyristor device 20 shown in FIG. 2 is sectionedin a plane perpendicular to the face of the paper. In an actual element,a multiplicity of the cells, each shown in FIG. 3, are connected in aleft-right direction of the figure. In addition, in FIG. 2, amultiplicity of the cells, each shown in FIG. 3, are connected in adirection perpendicular to the paper face of the figure. In FIG. 2 andFIG. 3, a buffer layer 22 of p-type SiC having a thickness ofapproximately 3 μm is provided on the upper face of a cathode region 21of n-type SiC having high impurity concentration and a thickness ofapproximately 320 μm. A cathode electrode 32 is provided on the lowerface of the cathode region 21. A p-type SiC base layer 23 having lowimpurity concentration and a thickness of approximately 60 μm isprovided on the buffer layer 22. In the central portion of the baselayer 23, an n-type SiC base region 24 and a p-type SiC anode region 25,each having a thickness of approximately 2 μm, are formed sequentially.An n-type SiC field relaxation region 26 is formed around the baseregion 24. On the surface of the GTO thyristor element 20 configured asdescribed above, a surface protection film 27 having three-layerstructure comprising a silicon dioxide layer, a silicon nitride layerand a silicon dioxide layer is formed. On the anode region 25, an anodeelectrode 28 is formed. On the left region on this anode electrode 28, asecond-layer anode electrode 29 is formed, and on the right region, agate electrode 31 is formed via an insulation film 30. As shown in FIG.3, on the n-type base region 24, a first-layer gate electrode 33 isformed, and the gate electrode 33 is connected to the gate electrode 31shown in FIG. 2 via a connection portion not shown.

An electron beam having an irradiation energy of approximately 4 MeV isapplied to the GTO thyristor 20 having the above-mentioned configurationat an electron density of approximately 7 10¹²/cm², and annealing iscarried out at a temperature of 700° C. for eight hours. The GTOthyristor element 20 having been subjected to this processing issoldered to the upper face of a support 38 using gold-siliconhigh-temperature solder. Lead wires 34 and 36 are gold wires having adiameter of 80 μm and connect between the anode electrode 29 and the end35 a of an anode terminal 35 and between the gate terminal 31 and theend 37 a of a gate terminal 37, respectively using a lead bondingapparatus. In FIG. 2, the lead wires 34 and 36 are shown only one innumber for each; however, in reality, a multiplicity of the respectivewires 34 and 36 are connected in parallel. The cathode electrode 32 isattached to the support 38 made of metal and having a cathode terminal39. The lead wires 34 and 36, the anode terminal 35, the gate terminal37 and the cathode terminal 39 are electrical connection means. Theanode terminal 35 and the gate terminal 37 are passed through thesupport 38 and firmly fixed while being insulated with high meltingpoint insulating glass portions 40 and 41, respectively from the support38.

A coating 42 of a synthetic polymer compound having high heat resistanceis applied so as to cover the entire face of the GTO thyristor element20 and the vicinities of the connection portions of the lead wires 34and 36 to the GTO thyristor element 20. Finally, a metal cap 43 ismounted and welded to the support 38 in the atmosphere of nitrogen gas,consequently, the SiC-GTO thyristor device 49 which is filled withnitrogen gas in the space 44 is completed. A temperature sensor 18 isprovided on the side face of the metal cap 43.

A heater 46 serving as a heating means and comprising a nichrome wire 46a embedded in heat-resistant rubber is bonded on the outer upper face ofthe metal cap 43. The cap 43 can be heated by passing a DC or AC currentthrough the heater 46 using terminals 47 a and 47 b coated withinsulators 48 a and 48 b, respectively. The heater 46 is a means forraising the temperature of the GTO thyristor element 20 and heats thecap 43 to raise the temperature of the GTO thyristor element 20.Although a temperature controller and a power source similar to thetemperature controller 140 and the power source 141 in accordance withthe first embodiment shown in FIG. 1 are also included in thisembodiment, they are omitted from illustration in FIG. 2.

When the SiC-GTO thyristor device 49 in accordance with this embodimentis operated, a current is passed through the heater 46 to heat the metalcap 43, consequently the temperature of the GTO thyristor element 20 israised to approximately 200° C. The method of detecting the temperatureof the GTO thyristor element 20 is similar to that in theabove-mentioned first embodiment. After the temperature of the GTOthyristor element 20 has reached approximately 200° C., a voltage of 5kV is applied so that the potential of the anode terminal 35 is higherthan that of the cathode terminal 39. When the potential of the gateterminal 37 was made equal to that of the anode terminal 35, the SiC-GTOthyristor device 49 was maintained in the OFF state wherein no currentflows, and a withstand voltage of 5 kV was obtained.

Subsequently, in this OFF state, the potential of the gate terminal 37is made lower than the potential of the anode terminal 35, and a gatecurrent is passed from the anode terminal 35 to the gate terminal 37. Asa result, the SiC-GTO thyristor device 49 turns to ON state, and acurrent is passed across the anode terminal 35 and the cathode terminal39. When the potential of the gate terminal 37 is made higher than thepotential of the anode terminal 35 in the ON state, the current flowingthrough the anode terminal 35 and the cathode terminal 39 is shifted toflow between the gate terminal 37 and the cathode terminal 39. As aresult, the current flowing through the anode terminal 35 and thecathode terminal 39 is interrupted, and the SiC-GTO thyristor device 49turns to OFF state. The voltage across the anode terminal 35 and thecathode terminal 39 at this time is a reverse voltage.

More specifically, when a negative voltage is applied to the cathodeterminal 39 and when a voltage equal to or higher than the built-involtage with reference to the potential of the anode terminal 35 isapplied to the gate terminal 37, the SiC-GTO thyristor device 49 turnsON. At this time, electrons are injected into the drift layer 23 fromthe cathode region 22, whereby conductivity modulation occurs, and theON resistance decreases significantly. In the ON state of the SiC-GTOthyristor device 49, when the potential of the gate terminal 37 is madehigher than the potential of the anode terminal 35, part or whole of thecurrent flowing through the anode terminal 35 and the cathode terminal39 is extracted from the gate terminal 37, consequently, the GTOthyristor can be made to OFF state.

In the SiC-GTO thyristor device 49 in accordance with this embodiment,the leak current density at a reverse voltage of 5 kV is 5 10⁻³ A/cm² orless in a high temperature atmosphere of 200° C.; hence, the reversevoltage characteristic was excellent.

In the SiC-GTO thyristor device 49 in accordance with this embodiment,it was possible to attain a controllable current of 150 A at a highcurrent density of 300 A/cm², at which it was difficult to energize aconventional Si semiconductor device having a high withstand voltage of3 kV or more. When a current of 150 A was passed through the GTOthyristor element 20 at a high current density of 300 A/cm² and a cyclicfrequency of 2 kHz while the temperature thereof was kept at 170° C.,the ON voltage was 3.4 V. When a current of 150 A was switched, the turnON time was 0.4 μs, the turn OFF time was 1.4 μs, the steady loss was255 W, and the switching loss was 103 W. When the above-mentionedoperation was carried out, the junction temperature of the GTO thyristorelement 20 became approximately 308° C. in a very short time.

In the case of a conventional Si-GTO thyristor having a withstandvoltage of 5.0 kV, the ON voltage is 5.3 V, the turn ON time is 8 μs andthe turn OFF time is 22 μs, when a current of 100 A (having a currentdensity of approximately 60 A/cm²) is passed at a temperature of 125° C.When the SiC-GTO thyristor device 49 in accordance with this embodimentis compared with this Si-GTO thyristor device, the ON voltage of theSiC-GTO thyristor device 49 in accordance with this embodiment is lowerby approximately 1 V, and the steady loss is approximately 96% of thatof the Si-GTO thyristor. The turn ON time and the turn OFF time of theSiC-GTO thyristor device 49 are short, that is, approximately 1/20 andapproximately 1/16, respectively, of those of the Si-GTO thyristor.Hence, the switching loss of the SiC-GTO thyristor device 49 isapproximately 1/18 or less of that of the Si-GTO thyristor. The totalloss of the SiC-GTO thyristor device 49 is approximately 17% of thetotal loss of the Si-GTO thyristor; consequently, a significantreduction was attained.

The ON resistance of the SiC-GTO thyristor device 49 at a junctiontemperature of 308° C. is smaller than the ON resistance of the Si-GTOthyristor device at a junction temperature of 125° C. Therefore, thetotal loss of the SiC-GTO thyristor device 49 is smaller than that ofthe Si-GTO thyristor device. Furthermore, an energy gap of approximately1.75 eV larger than the energy gap of Si remains until SiC loses theproperty of a semiconductor, as it were, until it becomes the state ofmetal. Also in this point, high reliability with respect to temperaturecan be ensured. The thickness of the p-type SiC base layer 23 having lowimpurity concentration is approximately 60 μm. Since the thickness ofthe depletion layer of the base layer 23 at a reverse voltage of 5 kV isapproximately 50 μm, a sufficient margin of approximately 10 μm isprovided. With this margin, high reliability with respect to theabove-mentioned withstand voltage can be ensured.

In this embodiment, the SiC-GTO thyristor element 20 is heated by theheater 46, and its temperature is maintained at a high temperature of200° C., and then the SiC-GTO thyristor device 49 is operated, wherebythe influence of stacking faults is reduced extremely. As a result, theON voltage does not rise during the operation, and high reliability canbe ensured. As mentioned above, according to the present embodiment, itwas possible to attain the SiC-GTO thyristor device 49 being large incontrollable current of 150 A, low in loss and high in reliability.

THIRD EMBODIMENT

A semiconductor device in accordance with a third embodiment of thepresent invention is an optically-coupled wide-gap power semiconductordevice, and FIG. 4 is a cross-sectional view thereof. In the figure, aGaN (gallium nitride)-GTO thyristor element 51 having a withstandvoltage of 3 kV and a current capacity of 160 A is used as a main powersemiconductor element having a light emission function. A SiC photodiode52 is used as a light-receiving element. The SiC photodiode 52 isprovided so as to be opposed to the GaN-GTO thyristor element 51 insidethe same package.

In the GaN-GTO thyristor element 51 shown in FIG. 4, a p-type GaN p-baseregion 53 having low impurity concentration and a thickness ofapproximately 35 μm is formed on the upper face of an n-type GaN cathoderegion 51 a having high impurity concentration and a thickness ofapproximately 250 μm. An n-type GaN n-base region 54 having highimpurity concentration and a thickness of approximately 1.7 μm is formedin the central region of the p-base region 53. A cathode electrode 66 isprovided on the lower face of the cathode region 52. An n-type SiC fieldrelaxation region 56 is formed inside the p-base region 53 around then-base region 54. A gate electrode 58 made of metal is provided in theright end portion of the n-base region 54. An n-type SiC anode region 55having a thickness of 3 μm is provided on the n-base region 54 excludingthe portion of the gate electrode 58. An anode electrode 59 of metalhaving a light emission window 60 is provided on the anode region 55. Asurface protection film 57 having a two-layer structure comprising asilicon nitride layer and a silicon dioxide layer is formed on thep-base region 53 and the field relaxation region 56.

The gate electrode 58 is connected to a gate terminal 62 by a gold leadwire 61. The anode electrode 59 is connected to an anode terminal 65 bygold lead wires 63 and 64. The cathode electrode 66 is mounted on asupport 67 of metal having a cathode terminal 68. The lead wires 61, 63and 64, the anode terminal 65, the gate terminal 62 and the cathodeterminal 68 are electrical connection means. As the lead wires 61, 63and 64, a multiplicity of the respective wires connected in parallelshould be used depending on the values of currents flowing therethrough.

The SiC photodiode 52 has the same configuration as that of aconventional photodiode except that SiC is used, therefore its detaileddescription is omitted. The SiC photodiode 52 is bonded to the innerface of a cap 70 via an insulation plate 71 made of aluminum nitride orthe like so that its light-receiving portion 80 opposes to the lightemission window 60 of the GaN-GTO thyristor element 51. The anodeelectrode 72 of the SiC photodiode 52 is connected to an anode terminal74 by a gold lead wire 73. A cathode electrode 75 is connected to acathode terminal 77 by a gold lead wire 76. The lead wires 73 and 76,the anode terminal 74 and the cathode terminal 77 are electricalconnection means, and these are connected to respective external wires.The anode terminal 74 and the cathode terminal 77 are firmly secured inthe through holes of the cap 70 via high melting point insulating glassportions 78 and 79. A coating 81 made of a transparent synthetic polymercompound is provided so that the GaN-GTO thyristor element 51, the SiCphotodiode 52, the lead wires 61, 63, 64, 73 and 76 and the end of thebase terminal 62 and the end of the emitter terminal 65 are covered. Onthe lower face of the support 67, a heater 85 having a nichrome wire 85a is provided.

The heater 85 is a heating means for raising the temperature of theoptically-coupled wide-gap power semiconductor device in accordance withthis embodiment. The heater 85 has two terminals 86 a and 86 b, and acurrent is passed through the nichrome wire 85 a via the two terminals86 a and 86 b to heat the heater 85. A temperature sensor 18 is providedon the outer face of the cap 70. Although a temperature controller and apower source similar to the temperature controller 140 and the powersource in accordance with the first embodiment shown in FIG. 1 are alsoused in this embodiment, they are omitted from illustration in FIG. 4.

An example of a method of producing the optically-coupled wide-gap powersemiconductor device in accordance with the third embodiment will bedescribed below. The GaN-GTO thyristor element 51 produced in advance issoldered to a predetermined position on the support 67 usinggold-silicon high melting point solder. The anode electrode 59 isconnected to the anode terminal 65 by the gold lead wires 63 and 64having a diameter of 80 μm by using a lead bonding apparatus. The gateelectrode 58 is connected to the gate terminal 62 by the gold lead wire61. The material of the synthetic polymer compound 81 before being curedis thickly applied so as to cover the GaN-GTO thyristor element 51.

The SiC photodiode 52 produced in advance is soldered to the inner faceof the metal cap 70 via the insulation plate 71 made of aluminum nitrideusing gold-silicon high melting point solder. Subsequently, the anodeelectrode 72 is connected to the anode terminal 74 by the gold lead wire73 having a diameter of 80 μm using a lead bonding apparatus. Inaddition, the cathode electrode 75 is connected to the cathode terminal77 by the gold lead wire 76. Next, the material of the synthetic polymercompound 81 before being cured is thickly applied so as to cover the SiCphotodiode 52 and the vicinities of the connection portions of the leadwires 73 and 76 to the SiC photodiode 52. In the end, the metal cap 70and the support 67 are assembled so that the light-receiving portion 80of the SiC photodiode 52 is opposed to the light emission window 60 ofthe GaN-GTO thyristor element 51 and the materials of the syntheticpolymer compounds with which the two are covered make contact with eachother, and then they are welded in an atmosphere of nitrogen. Then,heating is carried out for seven hours at a temperature of 200° C.,thereby the synthetic polymer compounds are cured in a state of having acertain degree of flexibility.

An example of operation of the optically-coupled wide-gap powersemiconductor device in accordance with the third embodiment will bedescribed below. First, the heater 85 is energized to heat the support67, and the temperature of the GaN-GTO thyristor element 51 inside thepackage is raised to approximately 200° C. The method of measuring thetemperature of the GTO thyristor element 51 is the same as that of theabove-mentioned first embodiment. The potential of the cathode terminal68 is made lower than the potential of the anode terminal 65, whereby aforward-bias state is obtained. Then, when the potential of the gateterminal 62 is made equal to the potential of the anode terminal 65, theOFF state wherein no current flows is maintained. The withstand voltageis 3 kv and a high withstand voltage is realized. The Sic photodiode 52is set to a reverse-biased state by means that the potential of theanode terminal 74 is made lower than the potential of the cathodeterminal 77.

ON/OFF driving is carried out as follows. The potential of the gateterminal 62 is made lower than the potential of the anode terminal 65,and a gate current is passed from the anode terminal 65 to the gateterminal 62. Consequently, the GaN-GTO thyristor element 51 turns ON,and light 50 having a wavelength of approximately 390 to 570 nm isemitted. This light 50 is received by the SiC photodiode 52, and aphotoelectric current corresponding to the amount of the light flowsacross the anode terminal 74 and the cathode terminal 77. The currentflowing across the anode terminal 74 and the cathode terminal 77indicates the operation state of the optically-coupled wide-gap powersemiconductor device in accordance with this embodiment. This currentcan be used to control the optically-coupled wide-gap powersemiconductor device in accordance with this embodiment.

When the potential of the gate terminal 62 is made higher than thepotential of the anode terminal 68 in the ON state of the GaN-GTOthyristor element 51, the current flowing across the cathode terminal 66and the anode terminal 59 is shut off and light emission stops. Since nolight is emitted, photoelectric current is extinguished and the SiCphotodiode 52 turns to OFF state.

The withstand voltage of the GaN-GTO thyristor element 51 in accordancewith this embodiment is approximately 3.0 kV, and the leak currentdensity thereof at this withstand voltage and at a high temperature of220° C. is 3 10⁻⁴ A/cm² or less, an excellent value. The insulationwithstand voltage across the GaN-GTO thyristor element 51 and the SiCphotodiode 52 was 5 kV or more, and the leak current density at 5 kV was1 10⁻⁵ A/cm² or less.

The GaN-GTO thyristor element 51 in accordance with this embodiment washeated to 185° C., and a current of 160 A was passed at a high currentdensity of 240 A/cm² and at a cyclic frequency of 3 kHz. The ON voltageat this time was 3.6 V, the turn ON time was 0.3 μs, the turn OFF timewas 0.7 μs, the steady loss was approximately 288 W, and the switchingloss was 68 W. The junction temperature of the GaN-GTO thyristor element51 has reached approximately 410° C. in a short time owing to thisenergization.

For comparison, in the case of a conventional Si-GTO thyristor having awithstand voltage of 3 kV or more, a current of 160 A cannot be passedat a current density of 240 A/cm². In the case of the Si-GTO thyristorhaving a withstand voltage of 3 kV, the ON voltage is 4.5 V, the turn ONtime is 6 us and the turn OFF time is 17 μs at a junction temperature of125° C. when a current of 120 A (a current density of approximately 45A/cm²) is passed.

When the GaN-GTO thyristor element 51 in accordance with this embodimentis compared with the conventional Si-GTO thyristor, the controllablecurrent of the GaN-GTO thyristor element 51 is 160 A, and is larger thanthe controllable current of 120 A in the Si-GTO thyristor. The ONvoltage of the GaN-GTO thyristor element 51 at a controllable current of160 A is approximately 80% of the ON voltage of the Si-GTO thyristor ata controllable current of 120 A, and the steady loss is approximately80%. The turned ON time and the turn OFF time of the GaN-GTO thyristorelement 51 are significantly short, approximately 1/20 and 1/24 of thoseof the Si-GTO thyristor, respectively. As a result, it was possible tomake the switching loss of the GaN-GTO thyristor element 51 small, 1/22or less of that of the Si-GTO thyristor, whereby it was possible tosignificantly reduce the total loss to approximately 19%. Although theoptically-coupled wide-gap power semiconductor device in accordance withthis embodiment was energized and operated continuously for 500 hours inan atmosphere of air at 185° C., the optical transfer efficiency was notlowered after the operation. In addition, the optically-coupled wide-gappower semiconductor device was disassembled and examined, and cracks,white turbidity and deformation did not occur in the protection film 81made of a synthetic polymer compound. Furthermore, the changes of thevalues in the forward voltage, the leak current density at 3 kV and theswitching time were within the ranges of measurement errors. Thecharacteristics of the SiC photodiode also had no change either.

In the case of the GaN-GTO thyristor, the ON resistance at a junctiontemperature of 410° C. is smaller than the ON resistance of the Si-GTOthyristor at a junction temperature of 125° C.; as a result, the totalloss is also smaller. In addition, an energy gap of approximately 1.7 eVremains until GaN loses the property of a semiconductor, as it were,until it becomes the state of metal. Hence, high reliability can beensured at a high temperature of 400° C. or more. Furthermore, since GaNhas a high dielectric breakdown field strength, approximately 1.5 timesthat of SiC, the p-type GaN base region 53 having low impurityconcentration and a thickness of 35 μm and functioning as a drift layerhas a value with a sufficient margin for the depletion layer at awithstand voltage of 3 kV; in this point, high reliability with respectto the withstand voltage can be ensured.

In this embodiment, the GaN-GTO thyristor element 51 is heated to 185°C. in advance by the heater 85 and then starts on operation. Therefore,the influence of stacking faults is hardly found, the ON voltage doesnot rise during the operation, whereby high reliability can be ensured.As described above, in this embodiment, it is possible to realize theoptically-coupled semiconductor device being low in loss, large incontrollable current and high in reliability.

FOURTH EMBODIMENT

A semiconductor device in accordance with a fourth embodiment of thepresent invention will be described referring to FIG. 5. Thesemiconductor device in accordance with the fourth embodiment is aSiC-pn diode device 19 a and provided with a heat sink 88 instead of theheater 15 in the SiC-pn diode device 19 in accordance with theabove-mentioned first embodiment shown in FIG. 1. Since the othercomponents are substantially the same as those of the above-mentionedfirst embodiment, only different portions are described, and overlappingdescriptions are omitted.

The SiC-pn diode device 19 a in accordance with the fourth embodimenthas a four-layer hexagonal shaped SiC-pn diode element 13 a having awithstand voltage of 7 kV. The pn diode element 13 a is the same as thepn diode element 13 in accordance with the above-mentioned firstembodiment, except that the thickness of the drift layer 2 of the n-typeSiC having low impurity concentration is approximately 80 μm(approximately 95 μm in the first embodiment).

The SiC-pn diode device 19 a in accordance with this embodiment has theheat sink 88 on the lower outer face of a support 10. An air cooling fan98 is provided in the vicinity of the heat sink 88. A temperature sensor18 is provided on the upper outer face of the cap 14, and its detectionoutput is input to a temperature controller 140. The temperaturecontroller 140 controls the operation of the fan 98 on the basis of thedetection output of the temperature sensor 18.

When a current is passed through the pn diode element 13 a, the pn diodeelement 13 a generates heat corresponding to the current. This heatgeneration is referred to as “self-heating.” In this embodiment, thetemperature of the pn diode element 13 a is raised by theabove-mentioned self-heating. Hence, the heat sink 88 being relativelycompact and made of aluminum for example is provided. If the heat sink88 is large and heat is radiated excessively, the temperature of the pndiode element 13 a does not rise; for this reason, it is ratherdesirable that a small sized heat sink 88 is provided in considerationof the balance between the heat generation amount from the pn diodeelement 13 a and the heat radiation amount from the heat sink. When thetemperature of the pn diode element 13 a exceeds a desired value, thefan 98 is operated on the basis of the detection output of thetemperature sensor 18 to forcibly cool the heat sink. The structure ofthe heat sink 88 should only be set so that the heat resistance betweenthe heat sink 88 and air at the forced cooling is approximately 1° C./W.

The operation of the SiC-pn diode device 19 a in accordance with thisembodiment will be described below. First, a predetermined DC current ispassed through the pn diode element 13 a in the forward direction for apredetermined time, whereby stacking faults are formed and thedegradation of the drift layer 2 and the anode region 3 owing to thestacking faults is accelerated. The progress of the degradation can beknown by the rise of the ON voltage. When the increase of the ON voltagestops, it is found that the degradation has been saturated. In thisembodiment, ordinary operation is carried out after the above-mentionedprocessing is carried out. It is desirable that the processing ofaccelerating the degradation owing to the above-mentioned stackingfaults in advance should also be carried out for the respectivesemiconductor devices in accordance with the above-mentioned first tothird embodiments.

An operation example of the SiC-pn diode device 19 a in accordance withthis embodiment will be described below.

A current of 200 A at a cyclic frequency of 5 kHz and a current densityof 360 A/cm² is passed through the SiC-pn diode device 19 a. At thistime, the ON voltage was 2.3 V, and the reverse recovery charge was 10.4μC. In addition, the steady loss was approximately 260 W, and theswitching loss was approximately 31 W. When the fan 98 was driven tosend a wind to the heat sink 88 so that the heat resistance between theair and the heat sink 88 was approximately 1° C./W, it was possible toset the junction temperature of the pn diode element 13 a atapproximately 350° C.

In the case of a conventional Si-pn diode having a withstand voltage of7.0 kV, the ON voltage was 3.4 V and the reverse recovery charge wasapproximately 113 μC at the time when a current of 150 A (currentdensity of approximately 50 A/cm²) was passed through at a junctiontemperature of 125° C. The steady loss of the SiC-pn diode device 19 ain accordance with this embodiment is approximately 90% in comparisonwith the above-mentioned conventional Si-pn diode. Furthermore, sincethe reverse recovery charge of the pn diode device in accordance withthis embodiment is smaller by approximately one order of magnitude, theswitching loss thereof also becomes smaller by approximately one orderof magnitude. The total loss of the SiC-pn diode device 19 a can bereduced significantly to approximately 49% of that of the Si-pn diode.The ON resistance of the SiC-pn diode device 19 a at a junctiontemperature of 350° C. is smaller than the ON resistance of the Si-pndiode at a junction temperature of 125° C.; as a result, the total lossis smaller. Furthermore, the semiconductor maintains an energy gap ofapproximately 1.64 eV until it loses the property of a semiconductor, asit were, until it becomes the state of metal. Since this energy gap ofthe SiC, 1.64 eV, is larger than the energy gap of Si, high reliabilitywith respect to temperature can be ensured.

The controllable current of the SiC-pn diode device 19 a in accordancewith this embodiment was 200 A. Since the thickness of the n-type SiCdrift layer 2 is approximately 80 μm, a margin of approximately 10 μm isprovided for the thickness of the depletion layer, 70 μm, at the timewhen a reverse voltage of 7 kV is applied, whereby high reliability withrespect to a withstand voltage of 7 kV is obtained.

In this embodiment, the degradation owing to the stacking faults isadvanced so as to become saturated, by passing a predetermined currentthrough the pn diode element 13 a for a predetermined time in advance.Hence, the degradation does not proceed gradually while the SiC-pn diodedevice is used, whereby the changes in characteristics with the passageof time are avoided.

Furthermore, until the pn diode element 13 a reaches a temperature of200° C. or more owing to self-heating at the start of the operation, thecurrent to be passed through is made smaller than the rated current.Hence, in the case that the temperature of the pn diode element 13 a isnot sufficiently high, the rising of the ON voltage owing to thestacking faults and the significant increase of the steady loss causedthereby can be avoided.

According to this embodiment, a heating means, such as a heater,provided for the semiconductor device in accordance with each of theabove-mentioned embodiments is not required, whereby the structure ismade simple and the semiconductor device can be made compact.

FIFTH EMBODIMENT

A fifth embodiment in accordance with the present invention relates toan inverter apparatus, a type of power conversion apparatus, wherein theSiC-pn diode device 19 in accordance with the above-mentioned firstembodiment and the SiC-GTO thyristor device 49 in accordance with theabove-mentioned second embodiment are used for switching sections. Inthe inverter apparatus in accordance with this embodiment, it isdesirable that one package in which the above-mentioned SiC-pn diodedevice 19 and SiC-GTO thyristor device 49 are accommodated should beused as a switching section.

FIG. 6 is a circuit diagram of the inverter apparatus in accordance withthis embodiment. FIG. 7 is a cross-sectional view of a switching module100 a serving as the switching section in which the pn diode element 13of the above-mentioned SiC-pn diode device 19 and the GTO thyristorelement 20 of the above-mentioned SIC-GTO thyristor device 49 areaccommodated inside one package.

In FIG. 6, an inverter apparatus 90 is a power conversion apparatus thatconverts the direct current of a DC power source 91 into a three-phasealternating current and supplies to a load 92. The inverter apparatus 90is a well-known circuit; three series connections, each comprising twoswitching modules 100 a and 100 b connected in series, are connected inparallel between the positive pole and the negative pole of the DC powersource 91. The connection points 101, 102 and 103 of the respectivethree series connections, each comprising the switching modules 100 aand 100 b, are connected to the load 92. Each of the switching modules100 a and 100 b is provided with a control circuit 93, the detailedconfiguration of which is not shown since it is well known. Each of thecontrol circuits 93 is controlled using a controller omitted fromillustration.

Since the switching modules 100 a and 100 b have the same configuration,the switching module 100 a will be described in detail.

In FIG. 7 showing the cross-sectional view of the switching module 100a, the pn diode element 13 shown in FIG. 1 and the GTO thyristor element20 shown in FIG. 2 are mounted on a support 125 made of metal.

The pn diode element 13 has substantially the same configuration as thatshown in FIG. 1; however, the thickness 95 μm of the drift layer 2 shownin FIG. 1, is reduced to 50 μm so as to have a withstand voltage of 5kV. The pn diode element 13 is mounted via an insulation plate 126 madeof aluminum nitride and having a thickness of approximately 500 μm whileinsulation from the support 125 is maintained. The anode electrode 6 ofthe pn diode element 13 is connected to the support 125 via a gold leadwire 8. The cathode electrode 7 of the pn diode element 13 is connectedto an anode terminal 110 via a lead wire 7 a.

The same GTO thyristor element 20 as that shown in FIG. 2 is mounted onthe support 125. The cathode electrode 32 of the GTO thyristor element20 is mounted on the support 125 having a cathode terminal 111 on thelower face thereof. The anode electrode 29 of the GTO thyristor element20 is connected to the anode terminal 110 via a lead wire 34, and thegate electrode 31 is connected to a gate terminal 112 via a lead wire36. By the above-mentioned connections, the pn diode element 13 isconnected in reverse parallel to the GTO thyristor element 20. On thelower face of the support 125, a heater 127 having a structure similarto that of the heater 85 shown in FIG. 4 is provided. The heater 127 hasterminals 128 and 129 for energization. The support 125 is provided witha cap 119 so that the pn diode element 13, the GTO thyristor element 20and the connection portions of the anode terminal 110 and the gateterminal 112 to the respective lead wires are covered, and the cap iswelded to the support 125 in a state that its interior is filled withnitrogen gas. On the outer face of the cap 119, a temperature sensor 18is provided.

When the inverter apparatus 90 in accordance with this embodiment isoperated, a current is passed through the heater 127 in advance beforeoperation to rise the temperatures of all of the switching modules 100 aand 100 b to approximately 200° C. The temperature of each of theswitching modules 100 a and 100 b is detected using the control circuits93 respectively corresponding thereto by the method described in theabove-mentioned first embodiment and controlled so as to be maintainedat a predetermined value.

An operation example of the inverter apparatus 90 in accordance withthis embodiment will be described below. The temperature of each of theswitching modules 100 a and 100 b is set at 200° C., the DC voltage ofthe DC power source 91 is set at 3 kV, and the switching frequency ofthe switching modules 100 a and 100 b is set at 2 kHz, and the inverter90 is operated. When an AC output current of 150 A was supplied to theload 92 during this operation, the loss caused in each of the switchingmodules 100 a and 100 b was 4.2 W, a relatively low value. Theefficiency of the inverter 90 was approximately 98.6%, whereby it waspossible to attain a relatively high efficiency. The controllablecurrent of each of the switching modules 100 a and 100 b constitutingthe inverter in accordance with this embodiment was 150 A and thedensity of the controllable current was 250 A/cm², whereby large valueswere obtained. Since each of the switching elements 100 a and 100 b isoperated at a high temperature of 200° C. or more, the rising of the ONvoltage owing to the influence of stacking faults occurred rarely,whereby it was possible to confirm that the increase of the loss owingto the rising of the ON voltage was avoided and that high reliabilitywas obtained.

Although the five embodiments in accordance with the present inventionhave been described above, the present invention covers many moreapplication ranges or derivative structures.

The semiconductor element may be, for example, a gate turn off thyristor(GTO thyristor), a static induction thyristor, a MOS thyristor, atwo-way GTO thyristor, a reverse conduction thyristor and a MOS gate GTOthyristor, provided that the element is a self-excited thyristor capableof being ON/OFF controlled using a gate control signal. The device mayalso be a composite diode, such as a pn diode having a pn junction and amerged diode.

In addition, a semiconductor element made of SiC or GaN serving as awide-gap semiconductor material has been described in each of theabove-mentioned embodiments; however, the present invention is alsoapplicable effectively to semiconductor elements made of wide-gap othersemiconductor materials, such as diamond, gallium phosphide and boronnitride.

Furthermore, the configuration of the present invention is alsoapplicable to each semiconductor element being opposite in polarity,wherein its n-type region is replaced with a p-type region and itsp-type region is replaced with an n-type region.

A heater comprising a metallic resistor, such as a nichrome wire,covered with silicone rubber was used as a heater serving as a heatingmeans for raising the temperature of the semiconductor element; however,for example, a plane-shaped heater obtained by subjecting a heatingelement disposed between two mica or ceramic sheets to forming using apressure-welding press may also be used. In addition, heaters made ofother materials, such as a ceramic heater and a cartridge heater, andradiant heating means, such as an infrared lamp and a far-infraredceramic heater, may also be used. Furthermore, as other methods, amethod of blowing hot air to the semiconductor device using a heat gunor the like and a method of induction heating the metal support 10 andthe metal cap 14 of the semiconductor device using a high-frequencyinduction heating apparatus may also be used. The self-heating of thesemiconductor element may also be used instead of the above-mentionedheating means. In this case, in the case of a semiconductor elementhaving three electrodes, either a method of passing a current betweenthe anode electrode and the base electrode or a method of passing acurrent between the anode electrode and the cathode electrode may beused.

In each of the above-mentioned embodiments, a TO-type package wherein ametal cap is used as the package of the semiconductor device is shown;however, a high heat-resistant resin cap may also be used instead of themetal cap. In addition, as the configuration of each semiconductordevice, a mold-type configuration generally used for Si power modules,such as a stud type, a flat type and a SIP type made of a highheat-resistant resin, may also be used, other than the TOM type. As amethod of controlling carrier life-time, irradiation of a gamma ray andirradiation of charged particles, such as protons and helium ions, mayalso be used, other than irradiation of an electron beam. In theabove-mentioned embodiments, a three-phase inverter apparatus is takenas an application example; however, other power conversion apparatuses,such as a matrix inverter and a DC-DC converter, may also be used.Furthermore, the present invention is also applicable to other powerconversion apparatuses, such as switching power supplies, rectifyingapparatuses, regulators and high-frequency generators, other thaninverters and converters.

INDUSTRIAL APPLICABILITY

The present invention is intended to realize a semiconductor devicebeing large in controllable current, low in loss and high in reliabilityeven at a high voltage, and is widely applicable to power uses dealingwith large currents and high voltages.

1-16. (canceled)
 17. An operation method for a semiconductor device thesemiconductor device comprising: a wide-gap bipolar semiconductorelement using a wide-gap semiconductor having stacking faults includingbasal plane dislocation, and having a built-in voltage in the forwarddirection; a semiconductor package accommodating said wide-gap bipolarsemiconductor element and having electrical connection means forconnecting said wide-gap bipolar semiconductor element to externalapparatuses; and means for heating said wide-gap bipolar semiconductorelement inside said semiconductor package at a temperature of 125° C. ormore; wherein the operation method comprising steps of: heating saidwide-gap bipolar semiconductor element at a first temperature of 125° C.or more and less that 200° C. before energization of the wide-gapbipolar semiconductor element; after a start of the energization,operating the wide-gap bipolar semiconductor element with an appliedcurrent smaller than a rated current till the wide-gap bipolarsemiconductor element reaches a second temperature of 200° C. or more;and after the wide-gap bipolar semiconductor element has reached thesecond temperature, allowing the wide-gap bipolar semiconductor elementto be applied with a current up to the rated current.
 18. An operationmethod for a semiconductor device according to claim 17, wherein afterthe start of the energization, the temperature of the wide-gap bipolarsemiconductor element is raised by the means for heating in addition toself-heating of the wide-gap bipolar semiconductor element.
 19. Anoperation method for a wide-gap bipolar semiconductor element using awide-gap semiconductor having stacking faults including basal planedislocation, and having a built-in voltage in the forward direction,comprising steps of: at a start of the energization, operating thewide-gap bipolar semiconductor element with an applied current smallerthan a rated current till the wide-gap bipolar semiconductor elementreaches a temperature of 200° C. or more; and after the wide-gap bipolarsemiconductor element has reached said temperature of 200° C. or more,allowing the wide-gap bipolar semiconductor element to be applied with acurrent up to the rated current.
 20. An operation method for asemiconductor device according to claim 19, wherein at the start of theenergization, till the wide-gap bipolar semiconductor element reachessaid temperature of 200° C. or more, the temperature of the wide-gapbipolar semiconductor is raised gradually.
 21. An operation method for asemiconductor device according to claim 20, wherein at the start of theenergization, till the wide-gap bipolar semiconductor element reachessaid temperature of 200° C. or more, the applied current is raisedgradually for the temperature of the wide-gap bipolar semiconductor tobe raised gradually.
 22. An operation method for a wide-gap bipolarsemiconductor element using a wide-gap semiconductor having stackingfaults including basal plane dislocation, and having a built-in voltagein the forward direction, comprising steps of: at the start of theenergization, operating the wide-gap bipolar semiconductor element withan applied current smaller than a rated current, waiting for an increaseof ON voltage to be stopped as a degradation owing to the stackingfaults is saturated by self-heating of the wide-gap bipolarsemiconductor element; and after the increase of ON voltage is stopped,allowing the wide-gap bipolar semiconductor element to be applied with acurrent up to the rated current.